Power consumption in an integrated circuit (IC) can be a factor in IC design. For example, increases in complexity and speed of IC designs can outstrip the benefits of advances such as voltage reduction and feature size scaling. Given higher clock rates and larger die sizes, power dissipation can, in some cases, become a limiting factor of performance in IC designs, e.g., in system-on-chip (SoC) designs.
One approach to managing power consumption in an IC is to design some areas of the chip to be “turned off” or otherwise consume less power. For example, a processor in a TV or other device can be designed to turn off selected areas of the processor when in a “standby” mode, while another area of the processor monitors for a “wake-up” call, e.g., from a remote control. In another example, a processor in a computer can run at full power when executing a processing-intensive task, and scale down the power used by the chip when executing a less-demanding task.